1. Field of the Invention
This invention relates to devices for generating periodic waveforms. More particularly, it relates to digital frequency synthesizers, direct digital synthesizers, or digital phase locked loops, for example, that generate a periodic waveform having enhanced spectral purity, faster operational speeds, and greater flexibility in performance optimization and waveform selection.
2. Description of the Prior Art
Digital frequency synthesis is a method for digitally generating periodic waveforms (often sinusoidal waveforms) when precise frequency resolution is desired. There are many applications that require a stable, low noise source for the synthesis of a periodic waveform. For example, radar applications call for the generation of a detection sinusoid. Radar applications also require such means for generating a chirp radar pulse. Obviously, any error in the detection sinusoid will result in reported detection of a frequency that is different from the actual frequency by the cumulative amount of the error. Similarly, any error in a transmitted chirp pulse will result in a transmitted chirp pulse different from the desired chirp pulse by the cumulative amount of error in the synthesized periodic waveform. Digital synthesis of periodic waveforms is preferred over analog generation because less noise is produced and digital sources are more stable. Digital components are also generally lighter in weight, less expensive, more easily implemented as integrated circuits, and more reliable. Moreover, digital systems provide enhanced frequency resolution.
Known methods of digitally generating periodic waveforms follow two primary steps: phase angle calculation and a look-up of the quantized waveform data point, corresponding to the calculated phase angle value, from a read only memory. The phase angle calculation is performed using weighted binary numbers, and the quantized waveform data points are also stored as weighted binary numbers in the read only memory.
More particularly, the method heretofore employed includes the steps of adding a numerical word stored in a phase increment register to a phase angle accumulator at a sample clock frequency. The numerical value of the phase increment word and the numerical capacity of the accumulator determine the overflow frequency of the accumulator, i.e., for an accumulator of any fixed numerical capacity a large phase increment value causes the accumulator to reach its maximum value and overflow more frequently, whereas a small phase increment value causes the overflow to occur less frequently. The numerical capacity of the accumulator determines the frequency resolution of the digital synthesizer, i.e., a large numerical capacity for the accumulator allows for a finer frequency resolution, whereas a smaller numerical capacity for the accumulator results in a grosser frequency resolution. For an accumulator of fixed numerical capacity the overflow of the accumulator, representing one period of the waveform being synthesized, is controlled by controlling the value in the phase increment register. A numerical representation of a phase angle is generated each sample clock when the accumulator is incremented by the value of the phase increment word. The numerical capacity of the accumulator represents a phase angle of 2.pi. radians. When this numerical capacity is reached the accumulator overflows beginning another period of the waveform. Each phase angle is used to address a read only memory containing the corresponding data point of the desired digitized waveform. The read only memory thus generates a series of digitized waveform samples, at the sample clock frequency, that produce a digitized periodic waveform at the overflow frequency of the accumulator. The final waveform that may be used in an application is then created by applying the digitized waveform samples to a digital-to-analog converter which is then low pass filtered. The digital-to-analog converter changes the digitized waveform into a staircase approximation of the periodic waveform in analog form. The low pass filter removes the higher frequency sampling components from the staircase approximation resulting in a more desirable analog waveform.
There are four sources of error, prior to the digital-to-analog converter, inherent within this well known approach. The first two sources of error result from the finite word length of the accumulator. The first source is a phase quantization error (e.sub.pq) that results from the fact that during the time period between sample clocks the output of the accumulator, and thus the phase of the digitized waveform, remains constant while the phase of the desired periodic waveform would be increasing linearly. This error can be reduced by increasing the numerical capacity of the accumulator allowing for a finer frequency resolution. Increasing the numerical capacity of the accumulator, however, increases the computation time of the accumulator because the prior art employs a weighted binary system for this calculation. In weighted binary systems, carry information from less significant binary digits must propagate and be included in the calculations for more significant digits. As the binary number becomes large more binary digits are required and thus more carry propagation delay.
The second error occurs (phase remainder or e.sub.pr) because the finite word length of the accumulator causes it to act as a fractional divider for some values of the phase increment word. Specifically, the output frequency of the accumulator (the overflow rate) is directly proportional to the value of the phase increment word and inversely proportional to the numerical capacity of the accumulator. If the numerical capacity of the accumulator is an integer multiple of the phase increment word, the accumulator will return to the same initial value each time it overflows and the zero crossings of the phase of the digitized waveform will coincide precisely with the zero crossing of the phase of the desired analog waveform. The numerical capacity of the accumulator, however, is often not an integer multiple of the phase increment word. For these values of the phase increment word the accumulator behaves as a fractional divider, i. e., the accumulator will overflow and not return to its original value. The series of resulting accumulator remainder values is periodic and modulates the output of the phase accumulator to produce some waveforms with a period less than the desired period and some waveforms with periods greater than the desired period but with an average waveform period equal to the desired waveform period over the period of the remainder values. This modulation creates sidebands, also known as line spurs, in the output spectrum of the generated waveform.
One method of reducing these line spurs in the prior art is to add a pseudo-random number to the least significant bits of the accumulator so that the remainder series is not periodic. This method reduces the energy in the lines spurs by spreading their energy over a wide (white noise) range of frequencies. This in turn raises the noise floor of the spectrum.
Another way of reducing these line spurs is to use values of phase increment words that maximize the period of the remainder sequence. The period of this remainder sequence is inversely proportional to the greatest integer factor common to both the numerical value of the phase increment word and the numerical capacity of the accumulator. A greatest common integer factor of one would thus maximize the period of the remainder sequence. For prior art accumulators, employing a weighted binary number system, any value of phase increment word that is an odd number will result in a greatest common integer factor of one and therefore a maximum period for the remainder series. Thus 50% of all possible phase increment word values in a weighted binary system will possess this desirous property. Of the phase increment word values that are even numbers, those that are integer powers of two will result in no line spurs because the numerical capacity of the accumulator is an integer multiple of these phase increment word values. For a weighted binary accumulator with capacity 2.sup.N there are 2.sup.N-1 possible phase increment word values (in order to satisfy the Nyquist sampling criteria) of which N-1 of these values result in no line spurs. Furthermore, these values of the phase increment word that result in no line spurs are in fixed locations. A sweep of frequencies using only these values would always result in a non-linear frequency chirp. All other even values of the phase increment word in a weighted binary accumulator result in a variable, non-maximum, remainder series period and thus in line spurs whose energies depend upon the phase increment word value used. Essentially 50% (for practical accumulators with large N) of all phase increment word values in a weighted binary system result in this non-minimized line spur condition.
A third source of error (phase compression or e.sub.pc) in the known method arises from the truncation of the phase accumulator bits used to address the read only memory. For every bit used in addressing the read only memory, the number of entries in the read only memory doubles; thus the size of the read only memory becomes impractical if too many of the phase accumulator bits are used to address it. Although the phase accumulator can accommodate many bits of phase resolution, only the most significant bits can be used, as a practical matter, to address the read only memory. The truncation of the less significant phase accumulator bits results in a storage compression nonlinearity error because the digitized waveform sample produced from the compressed read only memory will be at least slightly out of phase with the waveform sample that would have been produced had the less significant phase accumulator bits not been truncated and the read only memory not been compressed. This error also generates line spurs in the frequency spectrum of the periodic waveform being generated. The number, magnitude, and location of all these line spurs can be determined mathematically. Several numerical techniques have been developed to use at least some of the truncated phase accumulator bits in subsequent processing of the digitized waveform samples. In this way some of the phase precision is recovered. These techniques, however, take advantage of some of the symmetrical and geometrical properties of sinusoidal waveforms and would not be appropriate for an arbitrary generalized function waveform.
The fourth source of error (amplitude quantization or e.sub.aq) arises from the finite word length of the weighted binary waveform sample stored in the read only memory. This is also a quantization error that could be reduced by increasing the word size of the waveform sample. Increasing this word size, however, would increase the size of the read only memory. Furthermore, the reduction of this error is limited by the number of bits used by the subsequent digital-to-analog converter. It is useless to store more bits of precision for the digitized waveform samples than the digital-to-analog converter can use. In all digital applications where a digital-to-analog converter is not used the weighted binary word length of the digitized waveform samples will still be limited by the increased computation time in subsequent processing caused by increased carry propagation time as discussed earlier.